KEY NOTE SPEAKER - Janusz Rajski - Mentor Graphics

Chief Scientist, Director of DFT Engineering

Janusz Rajski received the Ph.D. degree in electrical engineering from Poznań University of Technology, Poland, in 1982. In June 1984, he joined McGill University, Montreal, Canada, where he became Associate Professor in 1989. In January 1995 he accepted the position of Chief Scientist at Mentor Graphics Corporation, Wilsonville, Oregon. In 2002 he became Director of DFT Engineering.

His main research interests include design automation and testing of VLSI systems, design for testability, built-in self-test, and logic synthesis. He has published more than 180 research papers in these areas and is a co-inventor of 36 US and international patents. He is also the principal inventor of Embedded Deterministic Test (EDT™) technology used in the first commercial test compression product TestKompressÒ. He is co-author of Arithmetic Built-In Self-Test for Embedded Systems published by Prentice Hall in 1997.

He was co-recipient of the 1993 Best Paper Award for the paper on logic synthesis published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, co-recipient of the 1995 and 1998 Best Paper Awards at the IEEE VLSI Test Symposium, co-recipient of the 1999 and 2003 Honorable Mention Awards at the IEEE International Test Conference, as well as co-recipient of the 2006 IEEE Circuits and Systems Society Donald O. Pederson Outstanding Paper Award recognizing the paper on embedded deterministic test published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. In 2009 he received the Stephen Swerling Innovation Award from Mentor Graphics “for his breakthrough innovation, TestKompress, and his many contributions to revitalizing Mentor's DFT business to its current position as #1 test business in EDA”.

Janusz was a guest co-editor of the June 1990 and January 1992 special issues of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems devoted to the 1987 and 1989 International Test Conferences, respectively. In 1999, he was a guest co-editor of the special issue of the IEEE Communications Magazine devoted to testing of telecommunication hardware. He was also an associate editor for IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Computers, and IEEE Design and Test of Computers Magazine. He has served on technical program committees of various conferences including the IEEE International Test Conference and the IEEE VLSI Test Symposium. In 2007 he served as a Program Chair for ITC.