What The Press And Our Clients Are Saying
GOEPEL and SiliconAid join forces to provide Chip Level Debug in Board and System Environments
GOEPEL offers a variety of test and inspection solutions for the electronics industry, specializing in JTAG based embedded system access (ESA) technologies, automated optical inspection (AOI) systems, solder paste inspection (SPI) systems, and in-line 3-D automated x-ray inspection (AXI) systems. At ITC 2012, the company is demonstrating embedded system access applications utilizing its SYSTEM CASCON platform.
SiliconAid is a specialist for JTAG based chip-level debug tools and was looking for a partnership with an industry leader in board test in order to bring its chip-focused debug tools to the board test community as well as allowing chip designers to debug their chip designs in board and system environments.
GOEPEL and SiliconAid decided to join forces to develop new capabilities that will benefit its respective customers throughout the entire product life cycle. The goal of the cooperation is the integration of the chip centric SiliconAid Debugger called JTD into GOEPEL’s SYSTEM CASCON platform based on a two-step approach. The first step is the ability to use GOEPEL JTAG/boundary-scan controller hardware, such as PicoTAP, SCAN BOOSTER, or SCANFLEX hardware, directly with SiliconAid’s JTD software. This first level of cooperation was demonstrated at GOEPEL’s booth during this year’s ITC.
The second, longer term, step will address the integration of JTD software within the SYSTEM CASCON platform. This will allow users to use the JTD software to focus on chip-level debug tasks, while the SYSTEM CASCON software manages the remaining board and system circuitry to provide test access to the chip under test.
”We are excited about the prospect of offering our customers the ability to use SiliconAid’s chip-level debug tools in conjunction with our board and system focused JTAG / boundary-scan test and in-system programming solutions”, comments Heiko Ehrenberg, Managing Director of North American Operations at GOEPEL Electronics. “This fits in perfectly with our strategy of utilizing embedded system access technologies for test, debug, and programming applications throughout the entire product life cycle.”
“SiliconAid is excited to be collaborating with Goepel to extend our chip level JTAG expertise for those Customer’s products that have progressed through the product development cycle to board level implementations”, says Jim Johnson, President of SiliconAid Solutions. “This combination of technologies will allow customers to leverage chip level patterns and advanced chip level focused debug at the board level and correlate both environments. The cooperation between Goepel and SiliconAid will greatly enhance our Customer’s time and quality to market.”
To learn more about the two companies and their respective products, or to get details about the proposed joint solutions, contact them through their respective websites.
AMD
AMD Selects NEW JTAG Tool to Raise the Bar on QualityAustin, Texas – March 24th, 2006 – SiliconAid Solutions, Inc. announced today that AMD (NYSE:AMD) has selected the SiliconAid’s JTV (JTAG verification) tool.
The JTV tool provides a robust verification environment to ensure that your verilog design with JTAG and your BSDL (Boundary Scan Description Language) are fully consistent and comply with the IEEE 1149.1 and 1149.6 standards.
"SiliconAid’s JTV JTAG tool has proven to be an extremely thorough and easy to use tool that provides excellent feedback. The transition was seamless and enabled us to continue important functionalities with virtually no interruption. As a result, we have a strong process driven by a great tool." - Tim Wood, AMD Fellow Complementary to an automated or custom JTAG design flow, JTV gives a quick, easy, and independent way to make sure your design is correct. JTV can output fault-simulated production test patterns and parametric tests. JTV is unique in its ability to verify that the chip design is JTAG-compliant and that the BSDL file accurately describes your JTAG design.
Mentor Graphics Corporation
Mentor Graphics Corporation (NYSE: MENT), one of the leaders in electronic design automation (EDA) has selected SiliconAid Solutions as its preferred DFT consulting subcontractor."We have worked with SiliconAid over several years successfully with multiple customers and projects. As a result of their senior DFT staff and dedication to quality and customer satisfaction, we call these guys first” says Scott Thompson, Mentor Consulting Manager for Yield Enhancement Services . "We leverage Jim and his team of experts to help augment existing staff on delivering world class DFT solutions to Mentor's customer base. We would recommend SiliconAid Solutions, Inc. DFT services to any company needing expert DFT advice and implementation assistance."
Intrinsity - Austin Texas
"Intrinsity's 2GHz FastMATH™ Processor was completed on schedule employing simulation, verification and DFT design services from SiliconAid Solutions.", said Mike Becker, Director of Processor Design at Intrinsity Inc. "They quickly integrated into our team, added clear value and we wouldn't hesitate to use them again."Analog Devices Incorporated
NEW JTAG Tool Improves BSDL Quality for Analog Devices’ ProductsAustin, Texas – June 28, 2005 –SiliconAid Solutions
Inc. announced today that Analog Devices, Inc. (ADI), a leading manufacturer of high-performance integrated circuits used in analog and digital signal processing applications, selected the SiliconAid Solutions’ JTV (JTAG verification) tool to enable high quality JTAG boundary scan functions and accurate BSDL files.
In the past, a significant manual effort has been required to generate and then verify the JTAG logic was correct. A custom testbench is generated to verify the boundary registers, TAP controller, and the associated connections. A BSDL file was generated but before JTV there was no formal or automated way to verify that the design actually matched the description in the BSDL file. Additionally, there was no automated way to verify that all modes of the JTAG where fully tested and that the device met the IEEE 1149.1 standard.
"JTV is a formal verification of the IEEE JTAG spec that saved the design teams using the tool countless months. As a result, the DSP and Digital Video Products that were developed with JTV have a high-quality JTAG boundary scan function and customers are seeing higher quality BSDL files for these products. JTV includes a boundary scan user's guide which is written in a clear and easy to understand style that teaches as well as guides the user about boundary scan design." - Luis Basto, Senior DFT lead.
"I've run thru all the boundary scan verification tests using SiliconAid's JTV tool. This is a very exhaustive list of about 20 separate tests that do everything one could consider with the boundary scan," continued Mr. Basto.
Fabless Mixed-Signal Start-Up
Our company is a small startup company developing mixed signal system on chip (SoC) ASICS. We brought in SiliconAid Solutions, Inc. to help evaluate our present design and recommend possible DFT solutions to lower the overall product cost for current and future designs.SiliconAid Solutions, Inc. quickly evaluated our design and generated a report to describe the benefits, cost trade-offs, and design impacts of adding DFT to our present device. Their willingness to work with us and tailor a level of involvement that fits our needs was a big plus. Although we do not have dedicated DFT capability right now we expect to develop it and having SiliconAid Solutions available to help us improve our capability will be helpful.
We would recommend SiliconAid Solutions, Inc. DFT services to any company needing expert, unbiased, and independent DFT advice. We have found SiliconAid Solutions, Inc. personnel to be very knowledgeable in all areas of test and DFT techniques and design integration.
We would not hesitate to recommend SiliconAid Solutions, Inc. services to any company needing DFT expertise.
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