Sponsored By     Hosted By       May 24, & 25  2006 May 24 - Tutorial (REGISTER NOW ! Free if pre-registered before May 23rd) Location : Learning Center - Freescale (bldg A, Parmer lane) Tutorial Day - May 24
Register for MAY 24th ( Tutorial Day ) -- See agenda below!
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MAY 24^th, 2006                                                                     

9:30 - 10:00 On site Registration (coffee provided)
10:00 - 10:10 Introductions and Agenda

Session 1 (IEEE 1149.X overview and implementing 1149.6) – Presenter: Carl Barnhart

 LUNCH - Free lunch sponsored by SiliconAid

Session 2 (Implementing and Verifying 1149.1) – Presenter: Bill Bruce

Introduction
- History
- Typical board-level defects
- JTAG Concepts
- Architectural overview
- JTAG board-level configurations
Instruction Functionality
- JTAG instructions
- Functional description of each instruction
- Bypass, Extest, Sample, Preload instructions
- Intest, Runbist instructions
Implementation
- Architectural overview
- Timing
- Tap controller
- Instruction register and decoder
- Bypass register
- Idcode, device ID, and usercode registers
- Boundary scan register
BSDL
- Overview
- Nuts and bolts
- Parts 1 - 10
Verification
- JTV Demonstration