Event Description
This 2 day DFT event will be held at the
Omni South Hotel. This event will consist of a day of a DFT class and a day open technical day. The
technical day will be a mix of vendors and guest presenters. The technical day is FREE and is open to all when you pre-register on this web site. You can register for the
conference now. Class registration is open
on a first come first serve bases.
DFT Class (May 24th)
JTAG Tutorial - Give by two of the best JTAG engineers in the US (Bill Bruce and
Carl Barnhart). This FREE one day tutorial will cover an overview for all the
IEEE JTAG related specifications. The Day will also include a detailed
description of 1149.1 and 1149.6.
Free Technical DFT Day (May 25th)
The technical day is a FREE day to any and all web-registered attendees. DFT and
test engineers from the semiconductor industry and the EDA community will be
presenting. The day will start with a Key Note Speaker followed by 6 to 8 technical talks and presentations. We expect to exceed over 150 attendees for the
final day of the event. DFT Companies will also be setting up small booth
demonstrations in the hallway just outside of the main conference hall. See
below for the Agenda!
CLICK HERE to register for Technical Day (May
25th)
8:00 - 8:30 On site Registration (coffee provided)
8:30 - 9:10 Key Note Address –
Ken Butler : Texas Instruments
Session 1 – Yield Impacts of DFT Chair: Jay Bedsole
9:10 - 9:40 - Andy Hughes (Cadence) Yield Diagnostics
9:40 - 10:10 - Greg Yeric (Synopsys) Yield Analysis
10:10 - 10:45 B R E A K
10:45 - 11:15 - Carl Barnhart (SiAid) JTAG flavors
Session 2 – DFM
Chair: Al Crouch
11:15 - 11:45 - Al Crouch - Data Collection for Yield
11:45 - 1:30 LUNCH -
Free lunch sponsored by SiliconAid
1:30 - 2:00 - Raj Raina (Freescale) - Challenges in 65ns
2:00 - 2:30 -
David Eppes (AMD) - SRAM FA and Debug
2:30 - 3:00 B R E A K
Session 3 – DFT and Debug
Chair: Andy Halliday
3:00 - 3:30 - Jayant D'Souza (Mentor) - At speed testing
3:30 - 4:00 -
Jason Doege
(DA-Test) - Fixing Transition Delay
4:00 - 4:30 - Abhijit Jas (Intel) - Minimizing Functional Constraints
4:30 - 5:30 - Panel
Discussion Referee: Jim Johnson
5:30 - 6:30 Happy Hour
Vendor Booths open from 8:30am - 6pm
SiliconAid Solutions - We can help!!!
|
